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{"affected": [{"configurations": [{"platform": null, "status": "affected", "versions": {"scheme": "generic", "value": "83ac6b"}}], "enrichment": {"confidence": 90.0, "confidence_source": "inferred", "scores": [{"score": 90.0, "source": "inferred"}, {"score": 100.0, "source": "matching"}]}, "original": {"product": "n/a", "source": "cna", "vendor": "n/a"}, "product": "or1200", "vendor": "openrisc"}], "created": "2026-07-17T22:00:04.378869+00:00", "title": "Unpredictable CPU Output from RTL/Netlist Mismatch in openRISC OR1200", "updated": "2026-07-31T01:15:18.427958+00:00", "vendors": ["openrisc", "openrisc$PRODUCT$or1200"]}